5/24/2023 (WED) 11:20 ～ 11:40C1-1WJWTPSeminar Venue C
Compact and Low-Power Open-Innovation Platform Leafony Accelerates Developments of IoT/CPS Applications
Leafony is an ultra-low power platform for IoT/CPS system development, consisting of ultra-small functional modules that can be easily assembled like a block toy. It covers wireless communication functions such as BLE, Wi-Fi, and LTE-M, and has been in use by companies and educational institutions. Anyone can quickly try out applications and service ideas because software development can be done easily using the Arduino development environment or PlatformIO. Hardware specifications, circuit diagrams, and software information are all open. Each functional module is called 'leaf' since it is small and green. The features of Leafony are as follows:
1) Ultra-small and easy to assemble
2) Low power consumption, capable of battery or solar power operation
3) Open-source hardware/software
4) Easy to create original leaves
In addition, an ultra-low power Arm-based 32-bit microcontroller leaf capable of executing Edge AI is also available, expanding its scope of application. In this presentation, Leafony's technology and the latest information will be introduced.
Mobile Computing Promotion Consortium
Takayasu Sakurai
Currently
Senior Research Fellow, Graduate School of Engineering, The University of Tokyo.
Professor Emeritus, Institute of Industrial Science, The University of Tokyo.
Representative of Trillion Node Research Group.
Life Fellow of IEEE.
D. from the University of Tokyo in 1981, he joined Toshiba Corporation. Engaged in design research and development of semiconductor memory and processors. He was a visiting researcher at the University of California, Berkeley, and has been a professor at the Institute of Industrial Science, University of Tokyo since 1996.
He has been engaged in technical consulting for many ventures and companies. He received the Pederson Award of the IEEE, the most prestigious award in the field of integrated circuit design, for his pioneering work in the design fundamentals of low-power, high-speed integrated circuits.
He has also received numerous other awards, including the Nikkei Power Electronics Award. He is a world expert in low-power circuit and system design, having delivered the keynote lecture at ISSCC, the international conference known as the Olympics of integrated circuits, together with Mr. Moore of Moore's Law, and has applied his technology to the Trillion Node Engine.
He has served as a chief executive and chairperson of many international conferences, and has also served as the director of the Nanoelectronics Division of the Japan Science and Technology Agency (JST).
Research Achievements and Projects
Since 1981, he has been consistently engaged in research and development in the field of semiconductor integrated electronics design, especially in the research and commercialization of low-power integrated circuits, CMOS memories, processors, and SoCs. In 2010, he received the IEEE Donald Pederson Award, the world's most prestigious award in the field of integrated circuit design. He has also led low-power design research worldwide, including keynote presentations on low-power design at IEEE ISSCC, the largest international conference in the field. He has served as project leader for the following large national projects
1998-2002 Project Leader, JST Pioneering the Future Project, Pioneering New System LSI Technology with Ultra Low Power Consumption and High Speed
2008~2013 Project Leader, Integrated Circuits for 3D Integrated Systems, NEDO
2009~2013 Project Leader, NEDO Ultra Low Power Project
2015~2021 Project Leader, Trillion Node Engine Project, NEDO
Major Awards
2002 IEEE Life Fellow
2009 IEICE Achievement Award (Pioneering development and practical application of CMOS LSI low-power circuit technology), IEICE Fellow
2010 IEICE Electronics Society Award
2010 IEEE Donald Pederson Award
2012 IEEE ISSCC Leading Contributor Award
2017 Nikkei Electronics, First Power Electronics Award Grand Prize
Senior Research Fellow, Graduate School of Engineering, The University of Tokyo.
Professor Emeritus, Institute of Industrial Science, The University of Tokyo.
Representative of Trillion Node Research Group.
Life Fellow of IEEE.
D. from the University of Tokyo in 1981, he joined Toshiba Corporation. Engaged in design research and development of semiconductor memory and processors. He was a visiting researcher at the University of California, Berkeley, and has been a professor at the Institute of Industrial Science, University of Tokyo since 1996.
He has been engaged in technical consulting for many ventures and companies. He received the Pederson Award of the IEEE, the most prestigious award in the field of integrated circuit design, for his pioneering work in the design fundamentals of low-power, high-speed integrated circuits.
He has also received numerous other awards, including the Nikkei Power Electronics Award. He is a world expert in low-power circuit and system design, having delivered the keynote lecture at ISSCC, the international conference known as the Olympics of integrated circuits, together with Mr. Moore of Moore's Law, and has applied his technology to the Trillion Node Engine.
He has served as a chief executive and chairperson of many international conferences, and has also served as the director of the Nanoelectronics Division of the Japan Science and Technology Agency (JST).
Research Achievements and Projects
Since 1981, he has been consistently engaged in research and development in the field of semiconductor integrated electronics design, especially in the research and commercialization of low-power integrated circuits, CMOS memories, processors, and SoCs. In 2010, he received the IEEE Donald Pederson Award, the world's most prestigious award in the field of integrated circuit design. He has also led low-power design research worldwide, including keynote presentations on low-power design at IEEE ISSCC, the largest international conference in the field. He has served as project leader for the following large national projects
1998-2002 Project Leader, JST Pioneering the Future Project, Pioneering New System LSI Technology with Ultra Low Power Consumption and High Speed
2008~2013 Project Leader, Integrated Circuits for 3D Integrated Systems, NEDO
2009~2013 Project Leader, NEDO Ultra Low Power Project
2015~2021 Project Leader, Trillion Node Engine Project, NEDO
Major Awards
2002 IEEE Life Fellow
2009 IEICE Achievement Award (Pioneering development and practical application of CMOS LSI low-power circuit technology), IEICE Fellow
2010 IEICE Electronics Society Award
2010 IEEE Donald Pederson Award
2012 IEEE ISSCC Leading Contributor Award
2017 Nikkei Electronics, First Power Electronics Award Grand Prize